Careers

We are bold, creative, focused on execution, and excited to be
growing our family with the industry’s leading talent. Learn more
about our open positions and join us in our mission to enable
high performance compute at the lowest power.

Careers

We are bold, creative, focused on execution, and excited to be growing our family with the industry’s leading talent. Learn more about our open positions and join us in our mission to enable high performance compute at the lowest power.

Why SiMa.ai?

SiMa.ai is a machine learning company enabling high performance compute at the lowest power. Founded by industry veterans, the company has raised more than $40M in funding with strong investor backing. We are hiring hardware, software, and systems architects to help innovate and build the industry’s first Machine Learning SoC (MLSoC), a heterogeneous compute platform that simultaneously supports traditional compute with an ML environment, providing a seamless software experience for our customers.

Your work will have a direct impact on our success.

Benefits and Perks to Support the Way We Live and Work

Our flexible work environment encourages personal and family time off, as well as paternity and maternity leave.

Competitive total compensation package, including stock awards, 401k, and employee assistance program.

Even though we are a startup, we want all of our employees and their families to have the best health and dental coverage and have the peace of mind they are well protected.

Cross-training opportunities available to support learning and career growth.

Quarterly peer-to-peer recognition program fosters acknowledgment for outstanding contributions.

Meals and snacks available in our office locations.

Benefits and Perks to Support the Way We Live and Work

Our flexible work environment encourages personal and family time off, as well as paternity and maternity leave.

Competitive total compensation package, including stock awards, 401k, and employee assistance program.

Even though we are a startup, we want all of our employees and their families to have the best health and dental coverage and have the peace of mind they are well protected.

Cross-training opportunities available to support learning and career growth.

Quarterly peer-to-peer recognition program fosters acknowledgment for outstanding contributions.

Meals and snacks available in our office locations.

Available Positions

MACHINE LEARNING HARDWARE / SOFTWARE ARCHITECT

Location
San Jose, CA | AI2009

Job Description
You will work with a cross-functional team to develop an architecture with industry-leading ML capabilities for the embedded edge market. You will work with compiler, simulation and systems teams to define SW and HW parts of the architecture.

Areas of focus:
SoC architecture, embedded ML, interconnects/buses, high speed I/O, memory technology, power management, debug for the embedded edge market.

Additional responsibilities include but not limited to the following:

  • Develop Machine Learning architecture comprehending hardware, software, and system needs.
  • Work closely with the compiler team to understand SW implications of the architecture.
  • Work with RTL micro architects and designers to help with implementation.
  • Develop software models to prove the ideas for power and performance.
  • Create an architecture simulator that demonstrates the full capability of the architecture. including requirements analysis and PPA (performance, power, area) tradeoff analysis.
  • Understand and analyze the interplay of hardware and software architectures in targeted applications.
  • Work on architectural features that would enable targeted safety levels. Conducting safety analyses, both quantitative and qualitative and identifying areas of improvement. Responsibilities will include leading functional safety-related activities for SoC development and ensure ISO 26262 compliance with respect to SoC architecture, processes and work products.
  • Document and publish results along with competitive benchmarking.
  • Create high-level product spec and architecture spec.

Minimum Qualifications

  • PhD or MS in Electrical engineering or Computer Science with 10-15+ years of experience and innovative designs in ML/CPU/GPU architectures and development.
  • Architected and developed software environment for SoCs: compiler, middleware, and library development.
  • Good programming skills in C, C++, Perl, or Python.
  • Strong mathematical foundation in machine learning and deep learning.
  • Experience with systems-level performance modeling, architecture simulation, profiling, and analysis.
  • Experience in characterizing and modeling system-level performance, Performance / Power estimation/modeling, competitive analysis, and documenting and publishing results.

APPLY NOW

MACHINE LEARNING COMPILER ENGINEER

Location
San Jose, CA | Job AI2003

Job Description
You will be part of the development team and will play a significant role in how we architect our software for compilers. You will work with a cross-functional team to develop a compiler targeting a novel machine learning architecture. You will develop algorithms to map machine learning workloads onto a processor and will work with HW, simulation, and other compiler engineers to solve performance, safety, and system bottlenecks.

Areas of focus:
Compiler development, model optimization, software performance analysis.

Depending on the candidate’s background, there is a lot of room for growth and expansion. Responsibilities include but not limited to the following:

  • Develop compiler technology targeting a novel machine learning processor architecture.
  • Work with developers of ML kernels and algorithms to enhance compiler functionality and support state of the art ML algorithms and techniques.
  • Work with architecture and simulator teams to utilize evolving hardware capabilities.
  • Work with test engineers to develop our testing infrastructure.
  • Analyze the compiler’s behavior on industry workloads, identify optimization opportunities, and improve compiler performance.

Minimum Qualifications

  • MS in Computer Science or Computer Engineering with 4+ years of industry experience or Ph.D. with 2+ years of industry experience.
  • Minimum 1 year of experience with compiler development or assembly language programming.
  • Solid understanding of how computer architecture affects software performance.
  • Experience with machine learning frameworks and algorithms.
  • Proficiency in software development with Python and C or C++, including design review, developing to a specification, reading and comprehending large codebases, root-cause analysis and fixing bugs.

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MACHINE LEARNING KERNEL ENGINEER

Location
San Jose, CA | Job AI2004

Job Description
You will design the kernel architecture to minimize power consumption. Working with a cross-functional team of design engineers, you will have the opportunity to think of new innovative ways to minimize power consumption so that our customers can continue to solve complicated matters with more accuracy, safety, reliability and be energy efficient.

Areas of focus:
Deep learning, kernel development, parallel computing, convolution.

Additional responsibilities include but not limited to the following:

  • Write optimized kernels.
  • Work with architects to achieve a functional coverage of the architecture in the simulator.
  • Work with the compiler team to assist in functional testing and performance characterization of various ML workloads.
  • Validate and suggest improvements to the hardware architecture specifications.

Minimum Qualifications

  • MS in Computer Science or Computer Engineering or Applied Math or Physics with 6+ years of experience or Ph.D. with 2+ years of experience.
  • Minimum 2 years of GPU programming or 2 years of developing kernels.
  • Strong background in linear algebra.
  • Hands-on programming experience in one of TensorFlow, PyTorch, NumPy.

Preferred Qualifications

  • Minimum 2 years of experience in developing kernels for Deep Learning at the chip level.
  • Minimum 2 years of high performance and parallel computing.
  • Experience with fixed-point arithmetic and quantization in deep learning is a plus.

APPLY NOW

MACHINE LEARNING BACKEND COMPILER ENGINEER

Location
San Jose, CA | Job AI2006

Job Description
You will work as a member of the compiler team with a focus on the development of advanced scheduling, placement, routing and constraint satisfaction algorithms for a highly parallel ML architecture. You will work with the frontend compiler, HW and simulation engineers to improve performance and power solutions by suggesting and implementing HW/SW features.

Areas of focus:
Deep learning, ML backend development on a constrained reconfigurable architecture.

Depending on the candidate’s background, there is a lot of room for growth and expansion. Responsibilities include but not limited to the following:

  • Design advanced algorithms to optimize hardware resource management and timing scheduling on a highly parallel architecture.
  • Develop methods and methodologies to perform constraint placement and physical connectivity among ML kernels.
  • Design a backend system that incorporates and maps ML representations, graphs and distributed programs onto a hardware resource model.
  • Analyze and suggest improvements to the hardware architecture specifications.

Minimum Qualifications

  • Ph.D. or MS degree in Computer Science, Computer Engineering or related field.
  • Minimum 3 years of experience with constraint satisfaction problems and nonlinear optimization methods.
  • Strong experience in graph algorithms, such as graph partitioning, graph search, and graph mining.
  • Strong proficiency in SW programming Python/NumPy and C++.
  • Experience with modern deep learning models and kernels is a big plus.

Preferred Qualifications

  • Excellent research and problem-solving capabilities in a deadline-driven technology world.

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MACHINE LEARNING MODEL OPTIMIZATION ENGINEER

Location:
San Jose, CA | Job AI2005

Job Description
You will work as a member of the software team on the development of a model optimizer, implemented within the TVM framework. You will work with the compiler, kernel developers, and simulation engineers to solve performance, accuracy and runtime bottlenecks by suggesting and implementing transformations.

Areas of focus:
ML model translations, quantization, high-level graph optimizations.

Below are some of the roles and responsibilities. There is opportunity for growth and expansion of responsibilities. Additional responsibilities, but not limited to:

  • Work with compiler developers to figure out the best place to achieve desired transformations.
  • Enable reading in model files from different frameworks, applying high-level graph optimizations, quantizing and generating input for SiMa.ai’s compiler.
  • Perform benchmarking and headroom analysis for accuracy and runtime performance of model execution.

Minimum Qualifications

  • BS in computer science with 5+ years of experience or MS in computer science with 3+ years of experience or Ph.D. in computer science with 1+ years of experience.
  • 2+ years of experience working on high level compiler transformations.
  • Proficient in programming in C++ and Python.

Preferred Qualifications

  • Background in ML frameworks like TensorFlow, PyTorch, etc.

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MACHINE LEARNING FUNCTIONAL SIMULATION ENGINEER

Location
San Jose, CA | Job AI2007

Job Description
Our engineers have the freedom to think outside of the box and create innovative solutions. You will work as a member of the simulation team to develop a functional cycle-accurate model of the hardware architecture. You will work with the HW, compiler, and other simulation engineers to solve performance, safety, and system bottlenecks by suggesting and implementing HW/SW features.

Areas of focus:
Functional simulator development, ML computing, co-simulation with RTL.

Depending on the candidate’s background, there is a lot of room for growth and expansion. Responsibilities include but not limited to the following:

  • Develop a cycle accurate simulator of ML architecture in C++.
  • Work with the compiler team to assist in functional testing and performance characterization of various ML workloads.
  • Validate and suggest improvements to the hardware architecture specifications.
  • Work with architects to achieve a functional coverage of the architecture in the simulator.

Minimum Qualifications

  • MS in computer science with 4+ years of experience or Ph.D. in computer science with 2+ years of experience.
  • Deep background in compute architecture.
  • Experience developing software using C++ and Python.
  • Experience in developing cycle-accurate processor simulators.
  • Experience with modeling various HW blocks in C or C++ simulators.
  • Experience with co-simulation and using simulators for RTL verification.

Preferred Qualifications

  • ML compute architecture
  • OpenSource coding experience
  • Experience with system-level performance, profiling, and analysis.

APPLY NOW

HARDWARE DESIGN VERIFICATION LEAD

Job Description
SiMa.ai is looking for a Hardware Design Verification lead to drive the HW verification of MLSoC ASIC for next-generation embedded edge platforms. Responsibilities would also include in developing testbenches, required drivers and checkers. It would also include creating test plans, coverage analysis, simulation and emulation support. This means working very closely with the RTL/uArch team and some cross-functional teams. The primary target for the verification effort is an SoC – MLSoC.

Areas of focus:
Verification methodology, testbenches, drivers, checkers, test plans. Support for emulation, simulators, chip validation. Active interaction with RTL/uArch team.

Roles and responsibilities include, but not limited to:

  • Verification methodology for an SoC.
  • Work with RTL/uArch, architects to solidify the uArch and in turn the architecture.
  • Verify the functionality, performance and other aspects of RTL designs. This would be both at the block-level and chip/system level.
  • Develop the requisite testbenches, drivers, checkers, scoreboards, models.
  • Lead the development effort for MLSoC.
  • Help with emulation, validation, and simulator chip bring-up efforts.

Desired background

  • Verification experience of an SoC.
  • MS in Computer Science/EE with 10+ years of experience in HW Design
    Verification, preferably with some relevant ML experience.
  • Proficiency in UVM methodology, Verilog, and SystemVerilog.
  • Expertise in scripting languages, Python.
  • Strong experience in helping emulation, validation, and writing testbenches.
  • Experience with modeling various HW blocks, IPs for verification, emulation.
  • Ability to analyze systems-level performance, profiling, and analysis.

APPLY NOW

HARDWARE PHYSICAL DESIGN LEAD

Job Description
SiMa.ai is looking for a Hardware Physical Design Lead to drive the Physical Design of MLSoC ASIC for next-generation embedded edge platforms. Responsibilities would include working with a back-end partner and SiMa.ai’s front end team in all physical design, design methodology and design automation processes.

Areas of focus:
Physical Design Methodology, synthesis, CDC, LEC, timing, power analysis, help with chip bringup. Active interaction with Design, Verification and back-end partner.

Roles and responsibilities include, but not limited to:

  • Physical Design of an SoC including block level modules.
  • Floorplan, place and route, clock tree synthesis and other back-end related activities.
  • Develop the design methodology, design automation.
  • Synthesis, Static Timing Analysis, Equivalence checking.
  • CDC, Power analysis, LEC.
  • Work with the front-end team.
  • Help with chip validation, bringup and characterization.

Desired background

  • Physical Design experiences with SoC, RTL to tapeout experience.
  • MS in Computer Science/EE with 10+ years of experience in Physical Design.
  • Work with back-end partners and IP vendors.
  • Proficiency in scripting and back-end tools.
  • Expertise in Stating Timing Analysis, Formal checking, and CDC.
  • Power analysis, UPF methodology.

APPLY NOW

HARDWARE DESIGN LEAD

Job Description
SiMa.ai is looking for a Hardware Micro-architecture and Design Lead to drive the hardware design of MLSoC ASIC for next-generation embedded edge platforms.

The HW design lead will help develop the micro-architecture and design methodology for SiMa.ai. Responsibilities include RTL coding, design, and reviews. It also includes synthesis, static timing analysis, and coverage analysis. This means working very closely with the architecture team, verification team, and the back-end team as well as cross-functional teams. The primary design target is an SoC ASIC with ML being a key component.

Areas of focus:
Design methodology, micro-architecture, RTL, static timing analysis, verification/emulation support, back-end support, chip bring-up. Active interaction with architecture, verification and back-end teams.

Roles and responsibilities include, but not limited to:

  • Microarchitecture, design of an SoC.
  • Work with the Arch team to develop the uArch and RTL.
  • Develop the design methodology.
  • Synthesis, Static Timing Analysis, Equivalence checking.
  • Work with the back-end team on floorplanning and other PD related activities.
  • Work with the verification, emulation teams.
  • Help with chip validation, bringup and characterization.

Desired background

  • Design experiences with SoC.
  • Experience in CV, Embedded systems
  • MS in Computer Science/EE with 10+ years of experience in HW micro-architecture, design preferably with some relevant ML experience.
  • Proficiency in Verilog, SystemVerilog.
  • Expertise in Stating Timing Analysis, Formal checking.
  • Ability to work with back-end teams in order to close designs.
  • Strong experience in helping emulation, verification.
  • Ability to analyze systems-level performance, profiling, and analysis.

APPLY NOW

SoC FIRMWARE ENGINEER

Location
San Jose, CA | Job AI2001

Job Description
Help us create our SoC Firmware team! You will work with a cross-functional team on SoC software development with industry-leading ML capabilities for the embedded edge market. You will contribute to product requirements gathering, definition, architecture and system implementation.

Areas of focus:
SoC firmware development. Boot and Security Unit (BSU), System Management Unit (SMU), boot code and peripheral drivers, security services, safety api, power, reset, clock, safety and error management. Software test libraries (BSIT etc), chip state verification.

Minimum Qualifications

  • Minimum BS Electrical Engineering or Computer Science with 8+ years of relevant work experience.
  • Experience in creating firmware for modern SoC’s plus experience with security (authentication, encryption, description, crypto) or safety (ASIL-B, ASIL-D, ASPICE, ISO 26262).
  • Strong programming skills in C with understanding of low-level details of architecture and programming at that level.

Preferred Qualifications

  • MSEE or MSCS with 4+ years of relevant work experience.
  • Comfortable with the ARM ecosystem.
  • Chip bring up and debugging experience.

APPLY NOW

VP, SOFTWARE ENGINEERING and ML SOFTWARE DEVELOPMENT

Location
San Jose, CA | Job AI2013

Job Description
The VP of Software Engineering and ML Software Development will drive the creation of the industry’s best “Ease of Use” End-to-End ML SW environment for SiMa.ai’s MLSoC™. This includes development of full ML compiler/tool chain infrastructure, IDE interface that integrates into various popular ML frameworks, optimized kernel and algorithms to map and schedule customer applications onto SiMa.ai’s highly scalable high-performance ML Accelerator architecture. This role will work in close partnership with the hardware platform team and system solutions team to collectively drive the engineering efforts across SiMa.ai.

Areas of focus:
Create and maintain the SiMa.ai unique SW solution (performance models/simulation environment, compilers, drivers, IDE, kernel) for MLSoC™. Drive the best development environment recognized for Ease of use and support for legacy SW/IP along with seamless integrated ML in one holistic environment.

ML

  • Create best in class algorithms to optimize performance of ML networks on our MLA hardware.
  • Develop the proper simulation and testing framework to support ML compiler.
  • Develop algorithms to efficiently implement scheduling and routing of machine learning networks.
  • Integrate ML compiler with existing frameworks such as Tensorflow, Pytorch, others.

Open Source and Third-party SW Leverage

  • Identify what parts need to be developed in-house, identify and partner with third parties or leverage open source software to jump start development.
  • Leverage SW building blocks provided by IP providers to jump start the development effort.

Minimum Qualifications

  • MS or PhD in computer science with 15+ years of experience.
  • Ability to hire and build great high performing teams.
  • Experience managing SW teams (with ML) in both small and large companies.
  • Ability to work with customers and integrate their requirements as part of agile SW delivery framework.
  • Experience of leveraging and developing on top of Open source software frameworks is highly desirable.
  • Track record of hiring and managing global teams is highly desirable.
  • Expertise in algorithms. Strong mathematical foundation in machine learning and deep learning.
  • Experience working with deep learning frameworks like Caffe, TensorFlow, and ONNX.
  • Experience working with ML solutions for the cloud or embedded applications.
  • ARM SoC and CV exposure and experience desired.
  • Experience in working with silicon and system solutions groups.
  • Proven track record and experience building and delivering complex SW products.

Personal Attributes

Can do attitude, execution and results focus, highly accountable, strong team player, high integrity, visionary, innovative and excellent hands on manager.

APPLY NOW

VP, SOFTWARE ENGINEERING – MLSoC SW DEVELOPMENT

Location
San Jose, CA | Job AI2012

Job Description
The VP of Software Engineering and MLSoC Software Development will drive the creation of the industry’s best “Ease of Use” SW environment for SiMa.ai’s MLSoC™. This includes the software environments to help customers design and develop applications for all the compute subsystems on SiMa.ai MLSoC including the ARM compute cluster, computer vision sub-system, image signal processor, system management unit and boot & security blocks. This role will work in close partnership with the hardware platform team and system solutions team to collectively drive the engineering efforts across SiMa.ai. The leader will also significantly expand and fully build out the team for MLSoC development and will own and drive the CI/CD environment.

Areas of focus:
Create and maintain the SiMa.ai unique SW solution (SW framework, drivers, support for various compute engines) for the MLSoC™. Drive the best development environment recognized for Ease of use and support for legacy SW/IP along with seamless integrated ML in one holistic environment.

Computer Vision

  • Computer Vision Support – OpenCv, OpenVx, Customer Kernel OpenCL-C.
  • Leverage CV SW from Synopsys and integrate into MLSoC SW environment.

ARM Compute Cluster

  • Traditional code – C/C++, Python,..
  • Leverage SoC SW from ARM and integrate into MLSoC SW environment.

Other Compute Subsystems

  • Traditional code – C/C++, Python,..
  • Develop/leverage/integrate SW for system management, boot & security and image signal processing blocks.

Open Source and Third-party SW Leverage

  • Identify what parts need to be developed in-house, identify and partner with third parties or leverage open source software to jump start development.
  • Leverage SW building blocks provided by IP providers to jump start the development effort.

Minimum Qualifications

  • MS or PhD in computer science with 15+ years of experience.
  • Proven track record of hiring and building high performing teams.
  • Ability to work with customers and integrate their requirements as part of agile SW delivery framework.
  • Experience of leveraging and developing on top of Open source software frameworks is highly desirable.
  • Track record of hiring and managing global teams is highly desirable.
  • Experience managing SW/FW teams developing embedded / compute SW.
  • Experience working with ML solutions for the cloud or embedded applications is highly desirable.
  • Leading SW teams leveraging ARM architecture is strongly preferred.
  • Experience in working with silicon teams is highly desirable.
  • Proven track record and experience building and delivering complex SW products.

Personal Attributes

Excellent communication skills, can-do attitude, execution and results focus, highly accountable, strong team player, high integrity, visionary, innovative and excellent hands on manager.

APPLY NOW

Don’t see an open position that’s right for you?
We’d still like to hear from you. Contact us at jobs@sima.ai.

SiMa.ai is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Don’t see an open position that’s right for you? We’d still like to hear from you. Contact us at jobs@sima.ai.

SiMa.ai is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.